From: Vsevolod Stakhov <vsevolod@highsecure.ru>
From: Duncan Bellamy <dunk@denkimushi.com>
Subject: [Fix] Restrict x86_64 assembly to x86_64
Origin: upstream, https://github.com/rspamd/rspamd/commit/f6dc828c3d8c015779eea7fb662198c6d58def14
Origin: upstream, https://github.com/rspamd/rspamd/commit/eee7acb309bae98e17c19b53bbd72cc9b798c281
Origin: upstream, https://github.com/rspamd/rspamd/commit/9766a457eb860b2eeb5e3e37ff86e82e89fe8c8d

---
 src/libcryptobox/CMakeLists.txt    | 19 +++++++++++++------
 src/libcryptobox/chacha20/chacha.c | 12 ++++++------
 src/libcryptobox/cryptobox.c       |  4 ++--
 3 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/src/libcryptobox/CMakeLists.txt b/src/libcryptobox/CMakeLists.txt
index 272701b..a7f8665 100644
--- a/src/libcryptobox/CMakeLists.txt
+++ b/src/libcryptobox/CMakeLists.txt
@@ -5,17 +5,24 @@ SET(BASE64SRC ${CMAKE_CURRENT_SOURCE_DIR}/base64/ref.c
 		${CMAKE_CURRENT_SOURCE_DIR}/base64/base64.c)
 
 IF(HAVE_AVX2)
-	SET(CHACHASRC ${CHACHASRC} ${CMAKE_CURRENT_SOURCE_DIR}/chacha20/avx2.S)
+	IF ("${ARCH}" STREQUAL "x86_64")
+		SET(CHACHASRC ${CHACHASRC} ${CMAKE_CURRENT_SOURCE_DIR}/chacha20/avx2.S)
+		MESSAGE(STATUS "Cryptobox: AVX2 support is added (chacha20)")
+	ENDIF()
 	SET(BASE64SRC ${BASE64SRC} ${CMAKE_CURRENT_SOURCE_DIR}/base64/avx2.c)
-	MESSAGE(STATUS "Cryptobox: AVX2 support is added (chacha20, avx2)")
+	MESSAGE(STATUS "Cryptobox: AVX2 support is added (base64)")
 ENDIF(HAVE_AVX2)
 IF(HAVE_AVX)
-	SET(CHACHASRC ${CHACHASRC} ${CMAKE_CURRENT_SOURCE_DIR}/chacha20/avx.S)
-	MESSAGE(STATUS "Cryptobox: AVX support is added (chacha20)")
+	IF ("${ARCH}" STREQUAL "x86_64")
+		SET(CHACHASRC ${CHACHASRC} ${CMAKE_CURRENT_SOURCE_DIR}/chacha20/avx.S)
+		MESSAGE(STATUS "Cryptobox: AVX support is added (chacha20)")
+	ENDIF()
 ENDIF(HAVE_AVX)
 IF(HAVE_SSE2)
-	SET(CHACHASRC ${CHACHASRC} ${CMAKE_CURRENT_SOURCE_DIR}/chacha20/sse2.S)
-	MESSAGE(STATUS "Cryptobox: SSE2 support is added (chacha20)")
+	IF ("${ARCH}" STREQUAL "x86_64")
+		SET(CHACHASRC ${CHACHASRC} ${CMAKE_CURRENT_SOURCE_DIR}/chacha20/sse2.S)
+		MESSAGE(STATUS "Cryptobox: SSE2 support is added (chacha20)")
+	ENDIF()
 ENDIF(HAVE_SSE2)
 IF(HAVE_SSE42)
 	SET(BASE64SRC ${BASE64SRC} ${CMAKE_CURRENT_SOURCE_DIR}/base64/sse42.c)
diff --git a/src/libcryptobox/chacha20/chacha.c b/src/libcryptobox/chacha20/chacha.c
index e4543d3..653c614 100644
--- a/src/libcryptobox/chacha20/chacha.c
+++ b/src/libcryptobox/chacha20/chacha.c
@@ -52,15 +52,15 @@ typedef struct chacha_impl_t {
 #define CHACHA_IMPL(cpuflags, desc, ext) \
 		{(cpuflags), desc, chacha_##ext, xchacha_##ext, chacha_blocks_##ext, hchacha_##ext}
 
-#if defined(HAVE_AVX2)
+#if defined(HAVE_AVX2) && defined(__x86_64__)
 	CHACHA_DECLARE(avx2)
 	#define CHACHA_AVX2 CHACHA_IMPL(CPUID_AVX2, "avx2", avx2)
 #endif
-#if defined(HAVE_AVX)
+#if defined(HAVE_AVX) && defined(__x86_64__)
 	CHACHA_DECLARE(avx)
 	#define CHACHA_AVX CHACHA_IMPL(CPUID_AVX, "avx", avx)
 #endif
-#if defined(HAVE_SSE2)
+#if defined(HAVE_SSE2) && defined(__x86_64__)
 	CHACHA_DECLARE(sse2)
 	#define CHACHA_SSE2 CHACHA_IMPL(CPUID_SSE2, "sse2", sse2)
 #endif
@@ -70,13 +70,13 @@ CHACHA_DECLARE(ref)
 
 static const chacha_impl_t chacha_list[] = {
 	CHACHA_GENERIC,
-#if defined(CHACHA_AVX2)
+#if defined(CHACHA_AVX2) && defined(__x86_64__)
 	CHACHA_AVX2,
 #endif
-#if defined(CHACHA_AVX)
+#if defined(CHACHA_AVX) && defined(__x86_64__)
 	CHACHA_AVX,
 #endif
-#if defined(CHACHA_SSE2)
+#if defined(CHACHA_SSE2) && defined(__x86_64__)
 	CHACHA_SSE2
 #endif
 };
diff --git a/src/libcryptobox/cryptobox.c b/src/libcryptobox/cryptobox.c
index 3139bb1..f34cd13 100644
--- a/src/libcryptobox/cryptobox.c
+++ b/src/libcryptobox/cryptobox.c
@@ -118,7 +118,7 @@ rspamd_cryptobox_test_instr (gint instr)
 	}
 
 	switch (instr) {
-#ifdef HAVE_SSE2
+#if defined HAVE_SSE2 && defined (__x86_64__)
 	case CPUID_SSE2:
 		__asm__ volatile ("psubb %xmm0, %xmm0");
 		break;
@@ -146,7 +146,7 @@ rspamd_cryptobox_test_instr (gint instr)
 		__asm__ volatile ("pcmpeqq %xmm0, %xmm0");
 		break;
 #endif
-#ifdef HAVE_SSE42
+#if defined HAVE_SSE42 && defined(__x86_64__)
 	case CPUID_SSE42:
 		__asm__ volatile ("pushq %rax\n"
 				"xorq %rax, %rax\n"
